Application Engineer- Signal Processing & HDL At MathWorks In Hyderabad

Application Engineer- Signal Processing & HDL At MathWorks In Hyderabad

Location: Hyderabad

Firm: MathWorks

Job Abstract

As an Software Engineer for Sign Processing and FPGA design, you’ll associate with our most modern clients to determine MATLAB and Simulink as a platform for a wide range of software areas together with:

  • Sign Processing and Communication System design 
  • HDL (VHDL/Verilog) code technology and verification 
  • Prototyping and implementing designs on FPGAs and SoCs

You’ll work with our clients to establish and perceive their technical and enterprise challenges. You’ll drive technical engagements that allow our clients to achieve their targets by adopting MathWorks options. Additionally, you will interact strategically with clients in creating long-term adoption plans that may allow them to progressively roll-out more and more productive workflows of their organisations. 

Utilizing your technical experience in addition to your glorious interpersonal, communication, and presentation abilities, you’ll interact clients and prospects to develop a shared imaginative and prescient for fulfillment.

Obligations

As a technical member of the gross sales crew, you may be answerable for interacting with potential clients, producing pleasure, confidence, and keenness for the utilization of Mannequin-Primarily based-Design inside their group for sign processing, communications, and radar system design. Mannequin-Primarily based-Design contains using MathWorks’ MATLAB, Simulink and HDL code technology and verification merchandise for deployment in complicated management and algorithmic functions. Your obligations embrace:

  • Managing product evaluations and creating adoption plans that help clients in adopting MathWorks merchandise 
  • Making ready and delivering displays, demonstrations, and software examples
  • Partnering with Gross sales Account Managers to assist develop account and territory stage promoting methods 
  • Establish new tendencies and software areas and supply suggestions to improvement and advertising groups. Collaborate with the worldwide crew on creating compelling messages and demonstrations.  
  • Advocating for the long run path of MathWorks merchandise primarily based on buyer interactions. 
  • Establishing rapport and credibility with our clients throughout a number of hierarchy ranges to construct champion customers and supporters of our options. 

Minimal {Qualifications}

  • Proficiency with HDL’s
  • A bachelor’s diploma and 6 years {of professional} work expertise (or a grasp’s diploma and three years {of professional} work expertise, or a PhD diploma, or equal expertise) is required.

Extra {Qualifications}

  • Put up-graduate diploma in Engineering (M.E./M.Tech./Ph.D) 
  • 3-7 years of related business expertise ideally within the Communications, Electronics, Semiconductors, or Aerospace/Defence (Avionics) industries. 
  • Robust data and expertise in modeling and simulating sign processing and/or communications and/or radar programs utilizing MATLAB and Simulink. 
  • Robust data and expertise in digital {hardware} design and implementation of sign processing/communications/radar algorithms on FPGAs.  
  • Expertise with MathWorks instruments (MATLAB, Simulink, Stateflow, HDL Coder) or different EDA instruments similar to Xilinx Vivado, SystemGenerator, ModelSim/ QuestaSim  
  • Data of System Verilog and {hardware} verification, UVM framework is a plus 
  • Glorious verbal and written communication abilities  
  • Extremely motivated towards working instantly with clients 
  • This place is predicated in Hyderabad with journey typically all through India for varied buyer visits and seminars. Journey time could be anticipated to quantity to roughly 30-40% with journeys typically not than 5 days. Although far much less frequent, some worldwide journey is predicted.

Comments

No comments yet. Why don’t you start the discussion?

Leave a Reply

Your email address will not be published. Required fields are marked *